Kniha Applied Formal Verification Harry Foster

Applied Formal Verification

For Digital Circuit Design

Autor: Harry Foster
Jazyk: Angličtina
Vazba: Pevná
Dostupnost: Skladem u dodavatele
Odesíláme za 10-13 dnů
2 913
Formal verification is a digital design method. This tutorial shows designers how to apply Formal Ve...

Informace o knize

Autor
Jazyk
Angličtina
Vazba
Kniha - Pevná
Vydáno
2005
Stránek
240
EAN
9780071443722
ISBN
9780071443722
Enbook ID
06505237
Hmotnost
508
Rozměry
154 x 231 x 23

Kompletní popis

Formal verification is a digital design method. This tutorial shows designers how to apply Formal Verification, along with hardware description languages like Verilog and VHDL, to solve real-world design problems.

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