Hardware Annealing in Analog VLSI Neurocomputing

Name: Hardware Annealing in Analog VLSI Neurocomputing
Brand: Springer
SKU: 9780792391326
Price: 2566 CZK
Availability: InStock

Autor: Bank W. Lee, Bing J. Sheu

Jazyk:

Vazba: Pevná

Vydavatel: Springer

Dostupnost: Skladem u dodavatele v malém množství

Odesíláme za 13-18 dnů

2 566 Kč

Rapid advances in neural sciences and VLSI design technologies have provided an excellent means to b...

Informace o knize

Autor

Bank W. Lee, Bing J. Sheu

Jazyk

Angličtina

Vazba

Kniha - Pevná

Vydáno

1990

Stránek

234

EAN

9780792391326

ISBN

0792391322

Enbook ID

01398050

Vydavatel

Springer

Hmotnost

1200

Rozměry

155 x 235 x 16

Kompletní popis

Rapid advances in neural sciences and VLSI design technologies have provided an excellent means to boost the computational capability and efficiency of data and signal processing tasks by several orders of magnitude. With massively parallel processing capabilities, artificial neural networks can be used to solve many engineering and scientific problems. Due to the optimized data communication structure for artificial intelligence applications, a neurocomputer is considered as the most promising sixth-generation computing machine. Typical applica tions of artificial neural networks include associative memory, pattern classification, early vision processing, speech recognition, image data compression, and intelligent robot control. VLSI neural circuits play an important role in exploring and exploiting the rich properties of artificial neural networks by using pro grammable synapses and gain-adjustable neurons. Basic building blocks of the analog VLSI neural networks consist of operational amplifiers as electronic neurons and synthesized resistors as electronic synapses. The synapse weight information can be stored in the dynamically refreshed capacitors for medium-term storage or in the floating-gate of an EEPROM cell for long-term storage. The feedback path in the amplifier can continuously change the output neuron operation from the unity-gain configuration to a high-gain configuration. The adjustability of the vol tage gain in the output neurons allows the implementation of hardware annealing in analog VLSI neural chips to find optimal solutions very efficiently. Both supervised learning and unsupervised learning can be implemented by using the programmable neural chips.

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Hardware Annealing in Analog VLSI Neurocomputing

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