MOS Based Adder Design for Multiplication Algorithms

Name: MOS Based Adder Design for Multiplication Algorithms
Brand: LAP Lambert Academic Publishing
SKU: 9786137382219
Price: 710 CZK
Availability: InStock

Autor: Afshan Amin Khan

Jazyk:

Vazba: Brožovaná

Vydavatel: LAP Lambert Academic Publishing

Dostupnost: Skladem u dodavatele

Odesíláme za 5-8 dnů

710 Kč

"One among the current trends in VLSI design is to minimize implementation area either by decreasing...

Informace o knize

Autor

Afshan Amin Khan

Jazyk

Angličtina

Vazba

Kniha - Brožovaná

Vydáno

2018

Stránek

EAN

9786137382219

Enbook ID

19345985

Vydavatel

LAP Lambert Academic Publishing

Hmotnost

107

Rozměry

150 x 220 x 4

Kompletní popis

"One among the current trends in VLSI design is to minimize implementation area either by decreasing the feature size or by decreasing the number of devices used to achieve the desired operation. However while doing so it is expected that the voltage value of the designated outputs gets degraded, due to which they might not be suitable for cascaded circuit design. Thus this work provided some basic design strategies that help us achieve circuit minimization of an adder circuit keeping in view its capability of driving the following cascaded stages in applications such as multiplier circuits."

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MOS Based Adder Design for Multiplication Algorithms

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