Network Intrusion Detection Based on Shift-OR Circuit

Name: Network Intrusion Detection Based on Shift-OR Circuit
Brand: LAP Lambert Academic Publishing
SKU: 9783846591178
Price: 967 CZK
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A High Performance Circuit Design Applied to Network Intrusion Detection System on a SoPC Platform

Autor: Huang-Chun Roan

Jazyk:

Vazba: Brožovaná

Vydavatel: LAP Lambert Academic Publishing

Dostupnost: Skladem u dodavatele

Odesíláme za 5-8 dnů

967 Kč

This thesis introduces a novel FPGA based signature match co-processor that can serve as the core of...

Informace o knize

Autor

Huang-Chun Roan

Jazyk

Angličtina

Vazba

Kniha - Brožovaná

Vydáno

2011

Stránek

EAN

9783846591178

Enbook ID

07065519

Vydavatel

LAP Lambert Academic Publishing

Hmotnost

106

Rozměry

150 x 220 x 4

Kompletní popis

This thesis introduces a novel FPGA based signature match co-processor that can serve as the core of a hardware-based network intrusion detection system (NIDS). The central idea of the signature match co-processor is an architecture based on the shift-or algorithm, which utilizes simple shift registers, OR gates, and ROMs where patterns are stored. Moreover, the architecture can be improved further by the removal of the ROM. The proposed architecture has been prototyped, simulated and synthesized by the Altera Stratix FPGA. Experimental results reveal that the circuit with processing two characters at a time attains the throughput up to 6.75 Gbits/sec with area cost of 0.7 logic elements (LEs) per character. The circuit with processing four input characters at a time achieves the throughput up to 9.2 Gbits/sec with area cost of 2.75 LE per character. As proposed architecture achieves higher throughput and less hardware resource in the FPGA implementations of NIDS.

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Network Intrusion Detection Based on Shift-OR Circuit

A High Performance Circuit Design Applied to Network Intrusion Detection System on a SoPC Platform

Informace o knize

Kompletní popis

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Zákaznicí kteří koupili tuto knihu koupili také