Kniha Source Level Debugging of Verilog Designs Naveed Riaz

Source Level Debugging of Verilog Designs

Automated Source Level Debugging of HDL Designs

Autor: Naveed Riaz
Jazyk: Němčina
Vazba: Brožovaná
Vydavatel: VDM Verlag
Dostupnost: U nakladatele na objednávku
Odesíláme za 17-27 dnů
1 407
Debugging is a very crucial part of hardware design cycle. Once a design is completed, all the possi...

Informace o knize

Autor
Jazyk
Němčina
Vazba
Kniha - Brožovaná
Vydáno
2010
Stránek
124
EAN
9783639262872
ISBN
3639262875
Enbook ID
06833627
Vydavatel
Hmotnost
191
Rozměry
152 x 229 x 7

Kompletní popis

Debugging is a very crucial part of hardware design cycle. Once a design is completed, all the possible faults need to be located and corrected. Although the complexity of hardware design is ever increasing, debugging is still mostly performed manually. Today, debugging has become a very painstaking and time consuming task. Model-based diagnosis provides a solid foundation for automated debugging and fault localization but sometimes the quality of the results is questionable as too many diagnosis candidates are reported. The work presented in this book shows how to apply model-based diagnosis to debugging of synthesizable Verilog designs. Moreover, Two extensions of the model based debugging theory to improve the debugging process in terms of reduction in the number of diagnosis candidates reported, are proposed.

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