Kniha Verilog Coding for Logic Synthesis Weng F. Lee

Verilog Coding for Logic Synthesis

Autor: Weng F. Lee
Jazyk: Angličtina
Vazba: Pevná
Dostupnost: Skladem u dodavatele
Odesíláme za 14-21 dnů
3 641
Provides a practical approach to Verilog design and problem solving. Bulk of the book deals with pra...

Informace o knize

Autor
Jazyk
Angličtina
Vazba
Kniha - Pevná
Vydáno
2003
Stránek
310
EAN
9780471429760
ISBN
0471429767
Enbook ID
01389469
Hmotnost
588
Rozměry
161 x 241 x 22

Kompletní popis

Provides a practical approach to Verilog design and problem solving. Bulk of the book deals with practical design problems that design engineers solve on a daily basis. Includes over 90 design examples. There are 3 full scale design examples that include specification, architectural definition, micro-architectural definition, RTL coding, testbench coding and verification. Book is suitable for use as a textbook in EE departments that have VLSI courses.

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